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rvcontroller
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RISC-V emulator for Mesecons Luacontrollers in Luanti
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rvcontroller.lua
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Author
11 hours
Don't check the timer interrupt periodically when waiting if it's not even en...
cheapie
12 hours
Add basic mesecons/digilines interrupt support
cheapie
3 days
Add Zicfilp extension and some CSR improvements
cheapie
4 days
Make custom extensions mutable
cheapie
7 days
Add machine timer interrupt
cheapie
7 days
Fix PC advancing on invalid compressed instructions
cheapie
7 days
Assorted trap improvements and add Smdbltrp extension
cheapie
7 days
Add trap handling support
cheapie
12 days
Add Xh3bextm extension from Hazard3
cheapie
13 days
Fix typo in documentation
cheapie
2026-06-06
Add (experimental for now) mesecons I/O support
cheapie
2026-05-29
Refuse to step if already running
cheapie
2026-05-29
Fix CSR write protection
cheapie
2026-05-29
Add mutable ISA support via writing to misa
cheapie
2026-05-29
Refuse to step manually if waiting on something
cheapie
2026-05-29
Show an error when running the endian command with an invalid argument
cheapie
2026-05-29
Use the newly-assigned marchid value
cheapie
2026-05-27
Fix big-endian doubleword stores/loads
cheapie
2026-05-25
Add CSR manipulation commands to monitor
cheapie
2026-05-25
Add experimental big-endian support (via MBE bit in mstatush)
cheapie
2026-05-25
Add Zimop, Zcmop, Zalasr, and Zawrs
cheapie
2026-05-24
Fix CSRs
cheapie
2026-05-23
Add initial content
cheapie