Move documentation out of the program and into separate filesHEADmain

1 files changed, 41 insertions, 0 deletions

diff --git a/doc/mmio.txt b/doc/mmio.txt
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+RVController Memory-Mapped I/O
+==============================
+
+Base address is configurable, see csr.txt.
+
+Base + 0: Mesecons I/O Direction
+
+ 31                     4   3    2    1    0
++---------------------------------------------+
+|        Reserved         |MDRD|MDRC|MDRB|MDRA|
++---------------------------------------------+
+
+MDRA: Mesecons I/O Direction, pin A
+MDRB: Mesecons I/O Direction, pin B
+MDRC: Mesecons I/O Direction, pin C
+MDRD: Mesecons I/O Direction, pin D
+
+When a bit in this register is set to 0, the corresponding pin is an input.
+When set to 1, the corresponding pin is an output.
+Changing a pin from output to input while the output is active may cause unusual behavior due to Luacontroller limitations.
+
+Base + 1: Mesecons I/O Data
+
+ 31                     4   3    2    1    0
++---------------------------------------------+
+|        Reserved         |MDTD|MDTC|MDTB|MDTA|
++---------------------------------------------+
+
+MDTA: Mesecons I/O Data, pin A
+MDTB: Mesecons I/O Data, pin B
+MDTC: Mesecons I/O Data, pin C
+MDTD: Mesecons I/O Data, pin D
+For inputs: Each bit contains the state of the corresponding input. Writes are ignored.
+For outputs: Each bit contains the state of the corresponding output. Writing to these bits turns the output on/off.
+Fields are read-only for inputs and read/write for outputs.
+
+Base + 2: mtime (see RISC-V Machine Level ISA specification)
+
+Base + 10: mtimecmp (see RISC-V Machine Level ISA specification)
+
+Base + 18 - Base + 255: Reserved