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| author | Christopher Head <chead@chead.ca> | 2018-12-21 11:10:08 -0800 |
|---|---|---|
| committer | Vitaliy <numzer0@yandex.ru> | 2018-12-21 22:10:08 +0300 |
| commit | 302a28934d75a2a29f7f060eea12cb19966f3e5a (patch) | |
| tree | 2f61a84bc02af0cd844038f0278fa0a178e55354 /mesecons_fpga | |
| parent | 6e767a6c7654748b376df22988ad656528b44911 (diff) | |
| download | mesecons-302a28934d75a2a29f7f060eea12cb19966f3e5a.tar mesecons-302a28934d75a2a29f7f060eea12cb19966f3e5a.tar.gz mesecons-302a28934d75a2a29f7f060eea12cb19966f3e5a.tar.bz2 mesecons-302a28934d75a2a29f7f060eea12cb19966f3e5a.tar.xz mesecons-302a28934d75a2a29f7f060eea12cb19966f3e5a.zip | |
Document inactive block behaviour (#447)
Diffstat (limited to 'mesecons_fpga')
| -rw-r--r-- | mesecons_fpga/doc/fpga/description.html | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/mesecons_fpga/doc/fpga/description.html b/mesecons_fpga/doc/fpga/description.html index 95177b2..a4cbeed 100644 --- a/mesecons_fpga/doc/fpga/description.html +++ b/mesecons_fpga/doc/fpga/description.html @@ -1,5 +1,6 @@ FPGAs can be used to chain multiple logic gates together in a compact manner. They come with 4 I/O ports and 10 internal registers, -which can then be connected with each other to form logic circuits.<br /> +which can then be connected with each other to form logic circuits. +They work fine in unloaded blocks.<br /> Supported gate types: <b>AND</b>, <b>OR</b>, <b>NOT</b>, <b>XOR</b>, <b>NAND</b>, <b>XNOR</b>, <b>Buffer</b> (=)<br /> I/O ports: <b>A B C D</b>; Registers: numbered <b>0</b> to <b>9</b> |