From 9ae11c52355e8a362d34d7cabfbc573ddf8c2f80 Mon Sep 17 00:00:00 2001 From: cheapie Date: Sat, 7 Nov 2026 16:25:42 -0600 Subject: Add Zknh --- doc/_start_here.txt | 4 +++- doc/instructions.txt | 12 ++++++++++++ 2 files changed, 15 insertions(+), 1 deletion(-) (limited to 'doc') diff --git a/doc/_start_here.txt b/doc/_start_here.txt index 0ca3f65..0d06129 100644 --- a/doc/_start_here.txt +++ b/doc/_start_here.txt @@ -5,7 +5,7 @@ RVController is a program for use in Luacontrollers (from the mesecons mod) in L It emulates a single RISC-V hart and a configurable amount (64KiB default) of RAM. Features: -* RV32IMACBZicboz_Zicfilp_Zicntr_Zicond_Zicsr_Zifencei_Zihintpause_Zihpm_Zilsd_Zimop_Zabha_Zacas_Zalasr_Zawrs_Zcb_Zclsd_Zcmop_Zcmp_Zcmt_Zbc_Zbkb_Zbkc_Zbkx_Zkr_Xh3bextm_Xh3misa instruction set provides: +* RV32IMACBZicboz_Zicfilp_Zicntr_Zicond_Zicsr_Zifencei_Zihintpause_Zihpm_Zilsd_Zimop_Zabha_Zacas_Zalasr_Zawrs_Zcb_Zclsd_Zcmop_Zcmp_Zcmt_Zbc_Zbkb_Zbkc_Zbkx_Zknh_Zkr_Xh3bextm_Xh3misa instruction set provides: - 32-bit address space - 32 32-bit registers (31 general-purpose + 1 zero register) - Selectable endianness @@ -21,6 +21,7 @@ Features: - Single-instruction function prologues/epilogues and jump tables - Compatibility with future MOP-based extensions - Forward-edge control-flow integrity via landing pads + - SHA-256 and SHA-512 hash acceleration - Compatibility with most code (not involving I/O) written for the WCH CH32V003, Espressif ESP32-C2/C3/C5/C6/C61/H2, Renesas R9A02G020/R9A02G021/R9A06G150, the RISC-V cores of the Raspberry Pi Pico 2, and many other chips * Mutable ISA via writable bits in misa CSR * Mesecons and digilines I/O @@ -77,6 +78,7 @@ RVController is intended to be compliant with the following specifications: * "Zawrs" Extension for Wait-on-Reservation-Set instructions, Version 1.01 * Zbkb: Extension for Bit-manipulation for Cryptography, Version 1.0.0 * Zbkx: Extension for Crossbar permutations, Version 1.0.0 +* Zknh - NIST Suite: Hash Function, Version 1.0.1 * Zkr - Entropy Source Extension, Version 1.0.1 - Note: Virtual source, backed by Lua math.random(), 16 bits available per clock cycle * Zicfilp: Control Flow Integrity - Landing Pad diff --git a/doc/instructions.txt b/doc/instructions.txt index 524a2b8..b7a0b86 100644 --- a/doc/instructions.txt +++ b/doc/instructions.txt @@ -298,6 +298,18 @@ Zbkx: Extension for Crossbar permutations, Version 1.0.0 * xperm4 rd,rs1,rs2 | Crossbar permutation (nibbles) * xperm8 rd,rs1,rs2 | Crossbar permutation (bytes) +Zknh - NIST Suite: Hash Function +* sha256sig0 rd,rs1 | SHA2-256 Sigma0 +* sha256sig1 rd,rs1 | SHA2-256 Sigma1 +* sha256sum0 rd,rs1 | SHA2-256 Sum0 +* sha256sum1 rd,rs1 | SHA2-256 Sum1 +* sha512sig0h rd,rs1,rs2 | SHA2-512 Sigma0 high +* sha512sig0l rd,rs1,rs2 | SHA2-512 Sigma0 low +* sha512sig1h rd,rs1,rs2 | SHA2-512 Sigma1 high +* sha512sig1l rd,rs1,rs2 | SHA2-512 Sigma1 low +* sha512sum0r rd,rs1,rs2 | SHA2-512 Sum0 +* sha512sum1r rd,rs1,rs2 | SHA2-512 Sum1 + Xh3bextm: Hazard3 bit extract multiple * h3.bextm rd,rs1,rs2,imm | Bit extract multiple, offset by register * h3.bextmi rd,rs1,imm1,imm2 | Bit extract multiple, offset by immediate -- cgit v1.2.3