From 69111aaf1a2b936bfa9d9ba53a4653f27c93312d Mon Sep 17 00:00:00 2001 From: cheapie Date: Fri, 6 Nov 2026 16:04:48 -0600 Subject: Add hpmcounter CSRs to CSR list and fix reading mtvec --- doc/csr.txt | 8 ++++++++ rvcontroller.lua | 2 ++ 2 files changed, 10 insertions(+) diff --git a/doc/csr.txt b/doc/csr.txt index 38a0770..8c2c465 100644 --- a/doc/csr.txt +++ b/doc/csr.txt @@ -22,9 +22,17 @@ The following standard CSRs are available: * 0xc00: cycle * 0xc01: time * 0xc02: instret +* 0xc03: hpmcounter3 +* 0xc04: hpmcounter4 +* 0xc05: hpmcounter5 +* 0xc06: hpmcounter6 * 0xc80: cycleh * 0xc81: timeh * 0xc82: instreth +* 0xc83: hpmcounter3h +* 0xc84: hpmcounter4h +* 0xc85: hpmcounter5h +* 0xc86: hpmcounter6h * 0xf11: mvendorid (0) * 0xf12: marchid (53) * 0xf13: mimpid ("RVCo") diff --git a/rvcontroller.lua b/rvcontroller.lua index 9d9a337..7d6a211 100644 --- a/rvcontroller.lua +++ b/rvcontroller.lua @@ -414,6 +414,8 @@ local function readcsr(address) bits[11] = mem.mpp%2 == 1 bits[12] = mem.mpp >= 2 return implodebits(bits,32) + elseif address == 0x305 then --mtvec + return mem.mtvecwritten and mem.trapbase+mem.trapmode or 0 elseif address == 0x310 then --mstatush local bits = {} bits[5] = mem.mbe -- cgit v1.2.3